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cpu.c

/*
 * (C) Copyright 2004 Texas Insturments
 *
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

/*
 * udelay() is CPU specific code
 */

#include <common.h>

/* See also ARM Ref. Man. */
#define C1_MMU          (1<<0)            /* mmu off/on */
#define C1_ALIGN  (1<<1)            /* alignment faults off/on */
#define C1_DC           (1<<2)            /* dcache off/on */
#define C1_WB           (1<<3)            /* merging write buffer on/off */
#define C1_BIG_ENDIAN   (1<<7)      /* big endian off/on */
#define C1_SYS_PROT     (1<<8)            /* system protection */
#define C1_ROM_PROT     (1<<9)            /* ROM protection */
#define C1_IC           (1<<12)           /* icache off/on */
#define C1_HIGH_VECTORS (1<<13)     /* location of vectors: low/high addresses */
#define RESERVED_1      (0xf << 3)  /* must be 111b for R/W */

int cpu_init (void)
{
      int i;

      /* turn off I/D-cache */
      asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
      i &= ~(C1_DC | C1_IC);
      asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));

      /* flush I/D-cache */
      i = 0;
      asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i));  // invalidate both caches and flush btb
      asm ("mcr p15, 0, %0, c7, c10, 4": :"r" (i)); // mem barrier to sync things

      return 0;
}









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